1. Field of the Invention
The present invention relates to a signal processing apparatus for processing a plurality of signals.
2. Related Background Art
A signal processing apparatus of one conventional type receives a signal and a black level signal, the signal being output from a photosensor or the like and containing a black level signal and a light signal, and subtracts the black level signal from the signal containing the black signal and the light signal to obtain the light signal with the black signal being eliminated. Such a conventional signal processing circuit will be described.
FIG. 1 is a circuit diagram of a conventional signal processing apparatus. The signal processing circuit shown in FIG. 1 has: buffer amplifiers 41 and 42 for receiving a signal output from a sensor or the like at a high input impedance and outputting the signal at a low output impedance; a subtractor amplifier 43 for subtracting one signal from the other respectively output from the buffer amplifiers 41 and 42; and an A/D converter (not shown) for converting an analog signal subtracted by the subtractor amplifier 43 into a digital signal.
The operation of the signal processing circuit shown in FIG. 1 will be described. A light signal containing a black level signal output from a sensor and another black level signal are input to the buffer amplifiers 41 and 42. The signals output from the buffer amplifiers 41 and 42 are input via resistors R3 and R1 to the subtractor amplifier 43.
The subtractor amplifier 43 subtracts the black level signal from the light signal and amplifiers it, this amplified signal being added to a signal having a predetermined value and output. This predetermined value is set to a lower limit value of a input voltage range (dynamic range) of the A/D converter in order to utilize the maximum dynamic range and improve a resolution. The signal output from the subtractor amplifier 43 is input to the A/D converter to convert the analog signal into a digital signal which is output to the external.
FIG. 2 is a circuit diagram showing the internal structure of the buffer amplifiers 41 and 42 and subtractor amplifier 43. Referring to FIG. 2, reference numeral 51 represents a power source terminal, reference numeral 52 represents a positive input terminal, reference numeral 53 represents a negative input terminal, and reference numeral 54 represents an output terminal. As shown in FIG. 2, for example, a light signal is input to the positive input terminal 52 and amplified by a differential amplifier having as its gate electrodes the positive and negative input terminals 52 and 53, thereby being output from the output terminal 54 thereof as a single end terminal.
Tendency of low power consumption in the field of electronics is changing a supply voltage for most electronic apparatuses and components to a low supply voltage. The power voltage of 5V was used for most integrated circuits (IC) in several years ago. Now, a power voltage of 3 V or lower is used. A lowered power voltage means a narrower dynamic range of the subtractor amplifier 43, buffer amplifiers 41 and 42 and the like.
With conventional techniques, as the power voltage is lowered, the dynamic range becomes narrower and an amount of signal components S is reduced. Even if the dynamic range is narrowed, an amount of noises N such as switching noise and random noises is not reduced because the noise amount is not dependent upon an input signal such as a light signal. As the dynamic range is narrowed, the S/N ratio therefore lowers.
In order to retain a desired S/N ratio even if the power voltage is lowered, it is necessary to reduce random noises su h as thermal noises generated in each amplifier as the dynamic range narrows. Of noises generated in a signal processing circuit, most of random noises are generated in buffer amplifiers and a subtractor amplifier. Switching noises are generated in a digital circuit such as an A/D converter.
Common power source and ground lines are often used for both a digital circuit such as an A/D converter and an analog circuit such as a buffer amplifier and a sensor. If these power source and ground lines are used in common, the digital circuit and buffer amplifier have the same impedance of the power source and ground lines. Therefore, switching noises generated in the digital circuit appear at the output of the analog circuit such as a subtractor amplifier.
In the analog signal substraction circuit shown in FIG. 1, the common mode rejection ratio of the light signal and black level signal in an output signal of the subtractor amplifier becomes low if a ratio R1/R2 is not equal to a ratio R3/R4, where R1 is a resistor between the buffer amplifier and the subtractor amplifier at the black level signal side, R2 is a resistor between a voltage source for supplying a predetermined voltage and the subtractor amplifier, R3 is a resistor between the light signal side buffer amplifier and the subtractor amplifier, and R4 is a resistor between the input and output terminals of the subtractor amplifier.
It is an object of the invention to provide a signal processing apparatus capable of outputting a signal having a high S/N ratio.
In order to achieve the above object, according to aspect of the present invention, there is provided a signal processing circuit comprising: first differential means for executing a differential operation between first and second signals to output a third signal; amplifier means for outputting fourth and fifth signals in accordance with the third signal output from the first differential means; converter means for converting the fourth and fifth signals which are analog signals, into digital signals; and second differential means for executing a differential operation between the digital fourth and fifth signals converted by the converter means, wherein the amplifier means outputs the fourth and fifth signals in accordance with a signal level of the third signal, the fourth and fifth signals output from the amplifier means having a signal level between lower and upper limit values of a dynamic range of the converter means.
Other objects and features of the present invention will become apparent from the following detailed description of the embodiments when read in conjunction with the accompanying drawings.